Formal Semantics of Synchronous Transfer Architecture
As a part of the RiSE seminar series, the Institute of Information Systems hosted a talk by Gordon Cichon.
|DATE:||Thursday, December 18, 2014|
|VENUE:||Seminar room Zemanek, Favoritenstraße 9-11, 1040 Vienna|
STA is a framework for digital hardware development that contains VLIW, FPGA, and hardwired ASIC architectures as corner cases. It maintains a strictly deterministic system behavior in order to achieve substantial savings in hardware costs, thus enabling systems with high clock speed, low power consumption and small die area. The high degree of parallelism requires a diligent development methodology to avoid implementation errors. Consequently, formal verification is the methodology of choice for reliable verification. This talk gives an overview of a formal semantic model that is suitable for such application.